Talk:Itanium

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Good articleItanium has been listed as one of the Engineering and technology good articles under the good article criteria. If you can improve it further, please do so. If it no longer meets these criteria, you can reassess it.
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May 14, 2007Good article nomineeListed
July 24, 2007Featured article candidateNot promoted
October 17, 2008Good article reassessmentKept
Current status: Good article


Is it correct to mix different measurement units for the same item?[edit]

I see that in the two ends of the range indicated for the FSB speed, the first end is expresed in MHz (MegaHertz i.e. millions of cycles per second) and the second one in GT/s (GigaTransfers per second). The two units are not the same and have not the same meaning. Hz is a unit used for referring to cycles per second, and since in one single cycle there can be more than one transfers (e.g. this is the case for DDR SDRAM memory), I deem this way of expressing figures for the same item could be misleading. Corrado72 (talk) 18:18, 8 December 2021 (UTC)[reply]

Itanium was developed by Digital Equipment Corporation, not HP.[edit]

The Itanium processor was developed at Digital Equipment Corp. in the late '80s. DEC was acquired by Compaq in 1998, which in turn was acquired by HP in 2002. So Hewlett Packard acquired, but did not develop the Itanium processor. The article does not mention DEC at all and should. — Preceding unsigned comment added by Mberman54 (talk • contribs) 11:53, 6 February 2017 (UTC)[reply]

You're confusing Alpha with Itanium. Guy Harris (talk) 17:51, 6 February 2017 (UTC)[reply]
No, Harris, you are wrong! EPIC VLIW architecture was really developed at DEC, alongside with DEC Alpha Team. HP once developed their PaRISC 2.0 to compete with it. Later both IA-64 and Alpha were bought by HP, they found Intel as their semi power support, and further development on that architecture is done by Intel only rather than HP. So Intel named IA-64 as Itanium Processor Architecture. -- Aaron Janagewen — Preceding unsigned comment added by 221.9.19.22 (talk) 00:18, 7 February 2017 (UTC)[reply]
Wrong.
Itanium - research project started in 1989, PA-WideWord by 1993, 1999 paper from HP on EPIC, instruction set manual released in 1999, Merced released in 2001.
DEC - purchased by Compaq in 1998, Compaq purchased by HP in 2002.
I.e., IA-64 was well under way long before HP bought Compaq.
Without a citation from a reliable source, I will not believe any claim that IA-64 was developed at DEC with no HP involvement. Guy Harris (talk) 02:14, 7 February 2017 (UTC)[reply]
Thank you for your reply. Your viewpoint and logic is without problem, but what the thing Compaq DEC research initially was based on VLIW and EPIC principle, and that architecture turns to be IA-64 after acquired by HP. In other words, IA-64 or Itanium architecture was researched much earlier than disclosed to the public. Once again, you are right! -- Aaron Janagewen — Preceding unsigned comment added by 221.9.19.22 (talk) 10:21, 8 February 2017 (UTC)[reply]
If I'm completely right, then whatever VLIW/EPIC research DEC/Compaq may have done, SEPARATELY from HP's research on VLIW/EPIC, did NOT turn out to be IA-64 after HP bought Compaq, given that, as you acknowledge when you say "your viewpoint and logic is without problem" and "you are right", IA-64 existed before HP bought Compaq. Guy Harris (talk) 18:24, 8 February 2017 (UTC)[reply]

Let's put everything into one timeline...

  • 1982-1985 - DEC: FOUR different RISC development projects. At least two of them (HR-32 and Prism) are 32-bit (hardly VLIW).
  • 1986 - HP: Introduces PA RISC processor
  • 1988 - DEC abandons Prism, the last of their RISC projects of that era. Dave Cutler goes to work for Microsoft and takes much of the Prism/Mica team from DECwrl with him.
  • 1989 - DEC: Begins development on Alpha
  • 1989 - HP: Itanium research project started at HP. "The Itanium architecture has its roots in research that began in the 1980s, when HP Labs set out to define an architecture that would converge HP's current lines of computer system products. This resulted in what became known as the PA-RISC architecture (Reduced Instruction Set Computing)."
  • 1992 - DEC: Alpha starts shipping (September). Note that there is not a trace of VLIW in Alpha (its instructions are 32 bits long)
  • 1993 - HP: Defines PA-WideWord architecture, "the basis of the HP-Intel alliance and the Itanium processor specification (formerly known as IA-64)."
  • 1994 - HP: HP partners with Intel to develop Itanium , targets 1998 for first product ship (hah)
  • 1998 - Compaq: Compaq acquires DEC, partly to get Alpha tech for their high-end machines
  • 1999 - HP: 1999 paper from HP on EPIC
  • 1999 - HP: Itanium instruction set manual
  • 2001 - Compaq: Decides not to use Alpha after all, sells all Alpha i.p. to Intel
  • 2001 - HP: First Itanium (Merced) shipped. Performance is disappointing.
  • 2002 - HP: HP acquires Compaq

So it is chronologically impossible for anything done at DEC to have been available to HP/Intel for Itanium development. Nothing from DEC was available to HP until the same year that Merced shipped. ...unless somebody working for DEC leaked the information to HP/Intel, but there's not a hint of VLIW/EPIC in Alpha, nor in (as far as I can find) the four RISC projects at DEC that preceded Alpha. So where's the evidence?

Is it possible that DEC did "early research on EPIC/VLIW" that didn't end up in Itanium? (or Alpha?) Well, it's not physically IMpossible... but given that there's no sign of EPIC/VLIW in Alpha, then if such research existed they must have considered it a dead end. There is no indication of anything like this in the Alpha Architecture book. Nor in the papers from DECUS Symposia back when DEC was hinting at those pre-Alpha RISC processors, or the Alpha itself.

Much more likely is that you've heard about "Epicode", which was part of the Prism architecture. But this had nothing to do with "explicitly parallel" anything. Rather, "Epicode" stood for "extended processor instruction code". This was basically writeable control store in the CPU that defined "extended instructions" and could be loaded via a maintenance operation (somewhat like updating motherboard firmware). This allowed the instruction set to be extended in ways required for a particular OS, and allowed the extended instructions to be implemented in different ways on different models of CPU while presenting the same semantics to the OS. (On my Alpha PC/150 I had to reload the PALcode when changing between VMS and Windows NT.) Alpha included this concept but renamed it "PALcode" (Privileged Architecture Library code). Given the timeline it's even possible that DEC heard of "EPIC" being worked on by HP/Intel and changed their name from Epicode to PALcode to avoid confusion. Jeh (talk) 20:37, 8 February 2017 (UTC)[reply]

Jeh is, of course, 100% correct here. See, for example, Prism System Reference Manual 3.0 for a description of the very-much-RISC-rather-than-VLIW/EPIC Prism, and see section 10 for a description of epicode; see Version 4 of the Alpha Architecture Handbook for the equally-RISC-rather-than-VLIW/EPIC Alpha, and see section 6 for a description of PALcode (which sounds, in some places, like they took the text from the Prism manual section 10). Guy Harris (talk) 08:46, 9 February 2017 (UTC)[reply]
(By the way, Jeh, if you're curious about Titan, one of the other two RISC projects, here's the Titan System Manual. I'll see if I can find anything online about HR32/HR-32 or whatever the Hudson RISC project was called and SAFE.) Guy Harris (talk) 09:00, 9 February 2017 (UTC)[reply]
Oh great, more time sinks. :) (Seriously, thanks!) Jeh (talk) 20:28, 9 February 2017 (UTC)[reply]
It would seem possible for ideas from DEC research to go into later versions of Itanium. There are a lot of changes over the years. I knew about it a long time before it was released, and I am sure that DEC was still around then. Gah4 (talk) 04:34, 17 February 2019 (UTC)[reply]
That would not, in any way, amount to "DEC designed Itanium"; it would, at most, mean "some idea DEC Research published a while ago, or that some DEC idea that, for example, HP picked up when they bought Compaq, got into a later version of the instruction set or a later implementation of it". Guy Harris (talk) 04:59, 17 February 2019 (UTC)[reply]

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Windows end of Support[edit]

Per Microsoft's lifecycle page, here, Windows Server 2008 R2 for Itanium-Based Systems has a note that says "See the latest Service Pack listing for this product for the end of support dates." The last service pack's end of life date is 1/14/2020, so this would imply that Itanium *is* still supported until 2020. That change shouldn't be reverted unless there is some (recent) article stating otherwise. The blog from 2010 is outdated. — Preceding unsigned comment added by S-1-5-7 (talk • contribs) 04:57, 8 April 2018 (UTC)[reply]

MOS:TENSE[edit]

From MOS:TENSE, events are past tense: designed, sold, manufactured, etc. Even though they stopped selling them, all the existing ones don't disappear. And even if they did, the design still exists. Since this article covers all the different models, and even all the instances (chips) of that model, it can still exist, even if none are still around. Shakespeare's plays still exist, even though he died, and are present tense. The actual example in MOS:TENSE came not so many years ago, when I was sitting next to a running PDP-10 and noticed that it was in past tense. Like Itanium, PDP-10 is a processor design, though there are still machines in that exist, and (at least before Covid-19) were still running. The VMS hobbyist program recent stopped supporting VAX, but still supports Alpha and Itanium. Sorry to hear about Linux. Gah4 (talk) 22:56, 29 July 2021 (UTC)[reply]

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